# PC or Laptop

From the last lecture we have the design and construction of a synchronous sequential system, the Diver of sequences. Usually when designing a sequential system, solving the problem can lead to

## the appearance of excessive internal states. So the diagram or table of states can contain

more condition than the real solution to the problem really requires.

# The number of internal states is a key parameter that affects performance and cost

of the sequential system. As the number of states determines the amount of material (logic gates) needed to build the system and get the desired output. In the last lecture we showed the realism that exists between the number of bistables and states system interiors: From the above formula we can say that r ≤ 2 ∗ n, so if we reduce the number of states then we also reduce the number of bistables that the system uses, which leads us to a more simplified system. But, The basic blocks that form a computer (physically) are called logic gates or only the gate. Gates are basic circuits that have at least one (and usually several) inputs and exactly one output. The input and output values are the logical values TRUE (1) and FALSE (0). In computer architecture it is common

### use 0 for false and 1 for true. The gates have no memory. The output value depends

only by the actual value of the inputs. A useful way to describe the relationship between the input values of the ports and the output is the table of that stalkers Synchronous sequential systems are otherwise known as systems with hours after input, output state this does not mean that the sex system has a lower cost, as reducing the number of states of interiors and bistables can lead to increased input and output variables, which increases more system cost.

In this lecture we will examine some methods for simplifying the excessive states it contains

system.Two internal states are equivalent when they for the same input sequences have the same

value of output functions and future state. In cases where we have two in the state table

#### states which are equivalent, they can be merged into a single state.Table 1, we see that the internal states D and E have the same future states, state A

for input X = 0 and state B for input X = 1. They also have the same output, ‘0’ for input X = 0

and ‘1’ for input X = 1. Then, we can say that these two states are equivalent in order

straight and they can be simplified to a single state, state D. We see that we no longer have

##### condition that can be simplified.

We reconstruct once again the table of states but already without the state E which has been replaced by condition D (table 2) and then reconstruct the diagram of simplified statesThe example given above, showed how we can simplify two equivalent states. Usually equivalence cannot be easily found. Definition given that two internal states are equivalent when they for the same input sequences have the same value of output functions and future condition, not always is easily evident from the analysis of the table of conditions. From this arises a necessary but not sufficient condition: that two states may be when the values ​​of the output function are the same regardless of future states, but provided that the states the future to be equivalent. This condition is based on the transient property: If state A is equivalent to state B and state B is equivalent to state C, then state A is equivalent to state C. From Table 3, we see that states B and C are equivalent, as for both the next state is found.

is H and the output ‘0’ for the input X = 0 and the next state is E and the output ‘0’ for the input X = 1;

so B ≡ C. Also, state I is equivalent to state J, as the next state is

A as for input X = 0 (output is ‘0’) and for input X = 1 (output is ‘1’), so I ≡ J.

If we look closely at the other states in Table 3, we see that the state G for the input X = 0

has as its future state the state J (which is equivalent to state I) and for the input X = 1

#### the next state is state C (which is equivalent to state B). While condition H for

the input X = 0 has as its future state state I (which is equivalent to state J) and for

input X = 1 the next state is state B (which is equivalent to state C). Starting and

from the transient property, we can say that the state G is equivalent to the state H, i.e.: G ≡ H.The table method of simplifying the internal states of a sequential system is based on a

the algorithm that two states can merge (combine) with each other if it is shown to exist

#### a transient property of equivalence between them. As mentioned above, two conditions

are equivalent if for each input they give the same output and go to state

same or equivalent futures between them.

To explain the tabular method we will rely on the table of the following states.

Posted in C++ ## Wireless networks

Fri Apr 10 , 2020
Wireless networks serve many purposes. In some cases they are used as cable replacements and in other cases they are used to provide access to corporate data remotely. Industry and technology have enabled these networks to be already valid and not just in limited regions. Mobile communication systems are the […] 